Method and apparatus for providing a gigabit ethernet circuit pack

ABSTRACT

Method and system for providing data transmission with transparency over the Gigabit Ethernet data stream includes receiving the 10 bit code with a data rate of 1,250 Mbits/second from the encoded 8B/10B data and arbitrarily selecting 9 bit codes using a look-up translation table which can fully represent the 10 bit codes received. The translated 9 bit codes with a data rate of 1,125 Mbits/second is then provided to eight STS-3 inverse multiplexer which inverse multiplexes the received codes into eight STS-3 data streams each with a data rate of 155.52 Mbits/second plus an offset Δ which are then provided to the modem for transmission to the far end via the optical transmission path.

RELATED APPLICATION

This application claims priority under 35 USC § 119 to provisionalapplication No. 60/269,225 entitled “Method and Apparatus for Providinga Gigabit Ethernet Circuit Pack” filed on Feb. 14, 2001, and toprovisional patent application entitled “System and Method forRecovering RZ Formatted Data Using NRZ Clock and Data Recovery,” havinginventors Nicholas J. Possley and David B. Upham, filed May 9, 2001, thedisclosures of each of is incorporated herein by reference for allpurposes.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to data network systems. In particular,the present invention relates to method and apparatus for providingtransparently transporting 155 Mb/s signals through a high speed datanetwork.

2. Description of the Related Art

Optical fiber is a transmission medium that is well suited to meet theincreasing demand in data transmission in communication networks.Generally, optical fiber has a much greater bandwidth than metal-basedtransmission medium such as twisted copper pair or coaxial cable, andprotocols such as the OC protocol have been developed for thetransmission of data over optical fibers. Typical communications systembased on optical fibers include a transmitter, an optical fiber, and areceiver. The transmitter converts the data to be transported into anoptical form using the proper protocol and then transmits the resultingoptical signal over the optical fiber to the receiver, where theoriginal data is recovered from the optical signal.

While adding more optical fiber to the existing communications networkinfrastructure is a costly option to meet the increasing demand forcommunication bandwidth, in some locations, expanding the existingnetwork may not be a viable alternative. Additionally, given the highcost of installation and the extensive amount of time required, addingmore optical fiber is not always an attractive option to increasecommunications bandwidth.

Due to the large bandwidth capability of optical fibers, this type oftransmission medium is most efficiently utilized when multiple usersshare the medium. In general, a number of low-speed data streams (“lowspeed channels”) transmitted by different users may be combined into asingle high-speed channel for transporting across the optical fibermedium. At the opposite end of the communications network, when thehigh-speed channel reaches the destination for one of the low-speedchannels that it is transporting, the low-speed channel must beextracted from the high-speed channel.

A typical optical communications network includes nodes (for example,central offices) which transmit high-speed channels to each other overoptical fibers. In addition to transporting low-speed channels throughthe nodes (commonly referred to as the “pass-through” function) as partof high-speed channels passing through the nodes, nodes may also combineincoming low-speed channels to the high-speed channel (i.e., the “add”function) and/or extract outgoing low-speed channels from the high-speedchannels (the “drop” function). These functions are commonly referred toas add-drop multiplexing (ADM).

For example, wavelength division multiplexing (WDM) and time divisionmultiplexing (TDM) are two known approaches to combining low-speedchannels into a high-speed channel. In WDM and its counterpart densewavelength division multiplexing (DWDM), each low-speed channel isplaced on an optical carrier of a different wavelength and the differentwavelength carriers are combined to form the high-speed channel.Crosstalk between the low-speed channels is a significant concern inWDM, and thus the wavelengths for the optical carriers must be spacedsufficiently far apart (typically 50 GHz or more) so that the differentlow-speed channels are resolvable.

In TDM, each low-speed channel is compressed into a certain time slotand the time slots are then combined on a time basis to form thehigh-speed channel. For example, given a certain period of time, thehigh-speed channel may be capable of transporting 10 bits while eachlow-speed channel may only be capable of transmitting 1 bit. In thiscase, the first bit of the high-speed channel may be allocated tolow-speed channel 1, the second bit to low-speed channel 2, and so on,thus forming a high-speed channel containing 10 low-speed channels.Generally, TDM requires precise synchronization of the differentchannels on a bit-by-bit basis (or byte-by-byte basis, in the case ofSONET), and a memory buffer is typically also required to temporarilystore data from the low-speed channels.

SUMMARY OF THE INVENTION

In view of the foregoing, a method of transporting data through a datanetwork, in accordance with one embodiment of the present inventionincludes the steps of receiving an encoded data, mapping the receiveddata to a predetermined data; and multiplexing the mapped predetermineddata.

In particular, the encoded data may be an 8B/10B encoded data whichincludes either a Gigabit Ethernet data and a Fiber Channel data.

The receiving step may further include the step of determining a datarate of the received encoded data, and the step of recovering a clocksignal from the received encoded data.

The clock signal may have a rate one tenth of said data rate, where thepredetermined data may include a 9-bit data. In turn, the 9-bit data mayinclude one of an arbitrary set of 9-bit data.

The multiplexing step may include the step of synchronizing themultiplexed predetermined data, where the multiplexed predetermined datamay be synchronized to a predetermined clock signal, and further, wherethe predetermined clock signal may include a phase locked loop clocksignal.

An apparatus for providing data transport through a data network inaccordance with another embodiment of the present invention includes aclock recovery unit configured to receive an encoded data, a datatranslation unit coupled to the clock recovery unit, configured totranslate the received data to a predetermined data, and an inversemultiplexer coupled to the data translation unit, configured to inversemultiplex the translated predetermined data.

The encoded data may include 8B/10B encoded data, and in particular, oneof a Gigabit Ethernet data and a Fiber Channel data.

The clock recovery unit may additionally detect a data rate of thereceived encoded data, and further, the clock recovery unit may befurther configured to recover a clock signal from the received encodeddata.

The clock signal may have a rate one tenth of said data rate.

Additionally, the predetermined data may include a 9-bit data, where the9-bit data may include one of an arbitrary set of 9-bit data.

The inverse multiplexer may be further configured to synchronize themultiplexed predetermined data to a predetermined clock signal, wherethe predetermined clock signal may include a phase locked loop clocksignal.

Additionally, a modem may be coupled to the inverse multiplexer toreceive the inverse multiplexed translated predetermined data fortransmission.

The inverse multiplexed translated predetermined data may include aplurality of STS-3 signals, where the plurality of STS-3 signals mayinclude eight STS-3 signals for transmission.

An apparatus for providing data transport in a network in accordancewith yet another embodiment of the present invention includes ademultiplexer configured to demultiplex received data, a datatranslation unit coupled to the multiplexer configured to translate thedemultiplexed data to a predetermined data, and a serializer coupled tothe data translation unit configured to receive the translatedpredetermined data and accordingly to generate a corresponding encodeddata.

The received data may include a plurality of STS-3 signals, where theplurality of STS-3 signals may include eight STS-3 signals.Additionally, a plurality of FIFOs may be provided, each configured toframe align the STS-3 signals, the frame aligned STS-3 signalscorresponding to the received signal.

The demultiplexed data may include a 9-bit data, where the 9-bit datamay have a data rate of 1,125 Mbits/second.

The demultiplexer may be further configured to perform parity checks onthe received data.

The predetermined data may include a 10-bit data.

The serializer may be configured to synchronize the translatedpredetermined data, where the translated predetermined data may includea 10-bit data, and further, where the 10-bit data may have a data rateof 1,250 Mbits/second.

The encoded data may include an 8B/10B encoded data.

A method for providing data transport in a network in accordance withstill another embodiment of the present invention includes the steps ofdemultiplexing a received data, translating the demultiplexed data to apredetermined data, generating a corresponding encoded data based on thetranslated predetermined data.

The received data may include a plurality of STS-3 signals, where theplurality of STS-3 signals may include eight STS-3 signals. The methodmay further include the step of frame aligning each of the STS-3signals, the frame aligned STS-3 signals corresponding to the receiveddata for demultiplexing.

The demultiplexed data may include a 9-bit data, where the 9-bit datamay have a data rate of 1,125 Mbits/second.

Additionally, the method above may further include the step ofperforming parity checks on the received data, as well as the step ofsynchronizing the translated predetermined data.

The translated predetermined data may include a 10-bit data, where the10-bit data may have a data rate of 1,250 Mbits/second.

Finally, the encoded data may include an 8B/10B encoded data.

In the manner described, the present invention discloses method andsystem for providing data transmission with transparency over theGigabit Ethernet as well as other data stream which includes receivingthe 10 bit code with a data rate of 1,250 Mbits/second from the encoded8B/10B data and arbitrarily selecting 9 bit codes using a look-uptranslation table which can fully represent the 10 bit codes received.The translated 9 bit codes with a data rate of 1,125 Mbits/second isthen provided to eight STS-3 inverse multiplexer which inversemultiplexes the received codes into eight STS-3 data streams each with adata ate of 155.52 Mbits/second which are then provided to the modulatorat the near end and demodulator at the far end.

These and other features and advantages of the present invention will beunderstood upon consideration of the following detailed description ofthe invention and the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 illustrates an overall system in the add direction in accordancewith one embodiment of the present invention.

FIG. 2 illustrates the overall system shown in FIG. 1 in the dropdirection in accordance with one embodiment of the present invention.

FIG. 3 illustrates an overall system configured for transporting OC-48optical signals in the add direction in accordance with one embodimentof the present invention.

FIG. 4 illustrates the overall system shown in FIG. 3 in the dropdirection in accordance with one embodiment of the present invention.

FIG. 5 is a tabular illustration of a pseudo STS-3 frame for use inmultiplexing Gigabit ethernet data in the overall system shown in FIGS.1-4.

FIG. 6 is a tabular illustration of a pseudo STS-3 frame for use inmultiplexing Fiber channel data.

FIG. 7 is a tabular illustration of a pseudo STS-3 frame for use inmultiplexing RZ data.

FIG. 8 illustrates frame byte definitions for pseudo STS-3 frames shownin FIGS. 5-7.

FIG. 9 illustrates a pseudo STS-3 configurable frame that can multiplexdata at any rate in accordance with another embodiment of the presentinvention.

FIG. 10 illustrates a table showing the configuration parameters foreach data rate for the configurable frame of FIG. 9.

FIG. 11 illustrates frame byte definitions for the configurable frame ofFIG. 9.

FIG. 12 illustrates a flowchart for providing data translation in theadd direction in accordance with one embodiment of the presentinvention.

FIG. 13 illustrates a flowchart for providing data translation in thedrop direction in accordance with one embodiment of the presentinvention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

FIG. 1 illustrates an overall system in the add direction in accordancewith one embodiment of the present invention. Referring to FIG. 1, inthe overall system 100, there is provided a clock recovery unit 110, adata translation unit 120, an STS-3 inverse multiplexer 130, and aphase-lock loop (PLL) unit 150. Furthermore, the data translation unit120 includes a 10 bit-to-9 bit translation table 121. In one aspect ofthe present invention, 8B/10B encoded data is provided to the clockrecovery unit 110. For example, both Gigabit Ethernet and Fiber Channelsignals are encoded using the 8B/10B encoding scheme. In particular,under this coding scheme, 8 data bits are translated into 10 bits forthe purpose of transition density of data for the clock recoveries andparity information for additional error detection.

Referring back to FIG. 1, in one embodiment, the clock recovery unit 110is configured to recover clock signals from the received encoded dataand to provide the recovered clock signal to the data translation unit120 and the PLL unit 150. Moreover, the clock recovery unit 110 is alsoconfigured to provide the 10-bit data with a data rate of 1,250Mbits/second to the data translation unit 120. As shown, the clocksignal from the clock recovery unit 110 in one embodiment may be at atenth of the data rate of the encoded data received. Moreover, in oneaspect of the present invention, the clock recovery unit 110 may beconfigured to receive the 8B/10B encoded data without a clock signal,and to derive a clock signal using a phase lock loop (PLL) within theclock recovery unit 110. The derived clock signal may then be used inthe digital components of the overall system 100 to sample and processthe data. Indeed, in one aspect, the PLL unit 150 may be configured tofrequency translate the incoming clock frequency to a predeterminedfrequency to derive a synchronous 155.52 MHz OC-3 clock that may be usedto interface with the system 100.

As further shown, the data translation unit 120 is configured totranslate the received 10-bit data to a corresponding 9-bit data. Inparticular, the system 100 queries the translation table 121 todetermine the 9-bit data corresponding to the received 10-bit data. Inone aspect of the present invention, the 10-bit to 9-bit translationtable 121 of the data translation unit 120 may include 464 unique 9-bitcodes, each corresponding to a separate one of the received 10-bit data.Moreover, the 9-bit codes may be arbitrarily chosen. Additionally, asshown in the Figure, 10 bit data received from clock recovery unit 110which do not require translation is passed through the data translationunit 120 which uses the translation table 121 to determine whether thereceived data bit code is valid, and outputs the valid confirmed 10 bitdata to the 8xSTS-3 inverse multiplexer 130.

Furthermore, as will be discussed below, any 10-bit data received whichdoes not map to one of the 464 9-bit codes in the translation table 121may result in a /V/ code translation indicating an error. It should benoted that /V/ codes are 10-bit codes defined by IEEE to be used forerror propagation. In particular, /V/ codes are inserted as data in theSTS-3 frame when a LOSYN defect or LOS defect exists on the adddirection input. In particular, in the case of Gigabit Ethernet or FiberChannel data streams, for a LOSYN defect, as soon as a comma isdetected, the /V/ code insertion ceases.

The translated 9-bit data with a data rate of 1,125 Mbits/second isprovided to the inverse multiplexer 130 which, along with the phase locklooped clock signal from the PLL unit 150, inverse multiplexes thereceived 9-bit data into corresponding STS-3 signals. In one aspect, thephase lock looped clock signal from the PLL unit 150 is at 155.52 MHzwith an offset Δ, where the offset Δ is a 20 ppm (parts per million) orless offset. Indeed, with the incoming bit data determined, the PLL unit150 locks onto the incoming data rate. An ADD PLL alarm may beconfigured to indicate the status of the PLL unit 150—whether the PLLunit 150 is in locked or unlocked state. This permits the overall systemto maintain the timing on the clock instead of the data. Furthermore, inanother embodiment, variable bit stuffing may be implemented as will bediscussed in further detail below. With both cases, since the adddirection clock signal is locked onto the incoming data, the data willfit exactly into the data frames shown in FIGS. 5-7 discussed in furtherdetail below.

Moreover, in addition to inverse multiplexing the 9-bit data into eightSTS-3 signals, the inverse multiplexer 130 is further configured toprovide variable byte stuffing. Then, the eight STS-3 signals, each at adata rate of 155.52 Mbits/second+offset Δ with all eight STS-3 signalssynchronized and frame aligned, are provided to a modem 140 fortransmission via the optical transmission line to the drop side. Inparticular, the modem 140 includes eight modulators one for each STS-3signal output from the STS-3 inverse multiplexer 130. More specifically,each of the eight modulators together comprising the modem 140 issimilar to modulator as described in pending U.S. patent applicationSer. No. 09/571,349, filed May 16, 2000 by inventors David A. Pechnerand Laurence J. Newell entitled “Through-Timing of Data TransmittedAcross an Optical Communications System Utilizing Frequency DivisionMultiplexing” assigned to the assignor of the present application, andthe disclosure of which is incorporated herein by reference for allpurposes.

As discussed above, in accordance with one embodiment of the presentinvention, 8B/10B encoded data which includes, for example, GigabitEthernet and Fiber Channel signals, may be fully represented by 9 bitsand may be transported transparently to ensure that parity and specialcode functions are passed on to the customers. Furthermore, in oneaspect of the present invention, the PLL unit 150 and the clock recoveryunit 110 may be configured to permit the overall system 100 to “tune” toeach of the signal rates, such as, for example, in the case of GigabitEthernet data whose rate is approximately 1,250 Mb/s encoded andapproximately 1,000 Mb/s decoded.

FIG. 2 illustrates the overall system shown in FIG. 1 in the dropdirection in accordance with one embodiment of the present invention.

Referring to FIG. 2, there is provided STS-3 multiplexer/9-bitdemultiplexer 220 which is configured to receive eight STS-3 signalsfrom modem 210. The modem 210 is similar to the modem 140 describedabove in FIG. 1 in the add direction of the communication path. Furthershown in FIG. 2 is a data translation unit 230 coupled to the STS-3multiplexer/9-bit demultiplexer 220, as well as a phase lock loop (PLL)unit 250 and a serializer 240. The serializer 240 may be provided withtranslated 10 bit data from the data translation unit 230 along withphase lock looped clock signal from the PLL unit 250 to regenerate the8B/10B encoded data. Coupled between the modem 210 and the STS-3multiplexer/9-bit demultiplexer 220 is a FIFO 260 which is configured toreceive the eight STS-3s for frame aligning. In particular, under thecontrol of a frame aligning state machine, FIFO 260 which in oneembodiment includes eight separate FIFOs for each of the receivedSTS-3s, is configured to frame align each received STS-3s to line up theSTS-3s which are received from the modem 210 with slight delay.

In particular, in accordance with one aspect of the present invention,the STS-3 multiplxer/9-bit demultiplexer 220 may be configured toperform parity checks and to demultiplex the 9 bits from the receivedeight STS-3 signals. The recovered 9-bit data with a data rate of 1,125Mbits/second is then provided to the data translation unit 230 whichincludes a 9-bit-to-10-bit translation table 231. In one embodiment, thesystem 200 may be configured to retrieve a corresponding 10-bit data forthe recovered, received 9-bit data from the STS-3 multiplexer/9-bitdemultiplexer. As will be discussed in further detail below, in oneembodiment, the 9-bit to 10-bit translation table 231 of the datatranslation unit 230 may be a look-up table stored in the datatranslation unit 230 under the control of a controller (not shown) ofthe data translation unit 230. In particular, the translation table 231may be, in one embodiment, stored in a storage unit within the datatranslation unit 230, where the storage unit may include a memory suchas a random access memory.

Referring back to FIG. 2, the PLL unit 250 is configured to receive a19.44 MHz clock signal from the STS-3 signal transmission from the modem210, and is configured to recover a clock signal at a tenth of the datarate to provide the clock signal to the serializer 240, as well as tothe data translation unit 230 and the STS-3 Multiplxer/9-bitdemultiplexer 220. As discussed above, the serializer 240 is configuredto synchronize the translated 10-bit data with a data rate of 1,250Mbits/second received from the data translation unit 230 with the clocksignal received from the PLL unit 250 and to regenerate the 8B/10Bencoded data. In this manner, in accordance with one embodiment of thepresent invention, in the drop direction, the 8B/10B encoded data may berecovered from the received eight STS-3 signals.

FIG. 3 illustrates an overall system configured for transporting OC-48optical signals in the add direction in accordance with one embodimentof the present invention. Referring to FIG. 3, there is provided a pairof Clock and Data Recovery (CDRs) 310 each configured to receive Gigabitethernet data. Also shown in FIG. 3 are Deserializer (DES) 320configured to receive the data and the clock signal from thecorresponding CDR 310 and output a 10-bit data each. The clock signalfrom the CDR 310 is also provided to the divider 330 which is configuredto divide the clock signal from the CDR 310 by a factor of 10. The10-bit data from the DES 320 is provided to the 10-bit to 9-bittranslation unit 340 which is configured to translate the 10-bit datareceived from the DES 320 into a respective corresponding 9-bit data.The 9-bit data from each 10-bit to 9-bit translation unit 340 is thenprovided to the elastic store unit 350. The elastic store 350 in oneembodiment is configured to perform buffering of the data during thetime the multiplexer is transmitting frame overhead or bit stuffing.

As further shown in FIG. 3, the clock signal divided by the divider 330is provided to the 10-bit to 9-bit translation unit 340 as well as tothe elastic store unit 350. The 9-bit data from the elastic store unit350 is provided to STS-48c Mapper/Scrambler 360 which is also configuredto receive a clock signal from the multiplexer clock 370. As furthershown, the multiplexer clock is also provided to each elastic storeunits 350. Additionally, the STS-48c Mapper/Scrambler 360 is alsoconfigured to receive overhead data from the STS-48c overhead generator380 as well as a 155.52 MHz clock signal. The 16-bit STS-48c data outputfrom the STS-48c Mapper/Scrambler 360 is then provided toserializer/optical transceiver 390 which is then configured to transmitOC-48c data to the remote side.

FIG. 4 illustrates the overall system shown in FIG. 3 in the dropdirection in accordance with one embodiment of the present invention.Referring to FIG. 4, OC-48c signal is received by CDR/Opticaltransceiver 410 which is configured to output 16-bit STS-48c data to theSTS-48c LTE/PM Demultiplexer/descrambler 420. The CDR/opticaltransceiver 410 is also configured to transmit a 155.52 MHz clock signalto the STS-48c LTE/PM Demultiplexer/descrambler 420. The 9-bit dataoutput from the STS-48c LTE/PM Demultiplexer/descrambler 420 is providedto respective FIFO leak buffer 430. The FIFO leak buffer 430 are alsoconfigured to receive the 155.52 MHz clock signal from the CDR/opticaltransceiver 410.

The frame aligned 9-bit data from the respective FIFO leak buffer 430 isthe provided to the respective elastic store units 440. Moreparticularly, the FIFO leak buffer 430 is configured to send the 155.52clock signal in addition to the 9-bit data. The elastic store unit 440is also configured to receive the 9-bit data from the FIFO leak buffer430. The 155.52 MHz clock signal from the FIFO leak buffer 430 is alsoprovided to the respective elastic store units 440 as well as to alogical OR 490.

Referring back to FIG. 4, as can be seen, the output of the 0 R 490which is a gapped clock signal, is provided to the dynamic phase lockedloop (DPLL) 450 whose output is provided to the elastic store unit 440,the 9-bit to 10-bit translation unit 460 and to the PLL multiplier 470.The multiplication factor for the PLL multiplier 470 may in oneembodiment include ten. As can be further seen from FIG. 4, the 9-bitdata provided from the elastic store unit 440 to the 9-bit to 10-bittranslation unit 460 is translated and output as a corresponding 10-bitdata. The 10-bit data from the 9-bit to 10-bit translation unit 460 aswell as the output from the PLL multiplier 470 is provided to the SER480 which is configured to output gigabit ethernet data from thereceived information. In this manner, in accordance with one embodimentof the present invention, in the drop direction of a data transmissionscheme, the data may be transported transparently in the data network.

FIG. 5 is a tabular illustration of a pseudo STS-3 frame for use inmultiplexing Gigabit ethernet data in the overall system shown in FIGS.1-4. Referring to FIG. 5, as can be seen, the Gigabit ethernet datapseudo STS-3 frame table 500 substantially corresponds to the STS-3inverse multiplexer 130 of the overall system 100 shown in FIG. 1.Indeed, as shown, each of the eight sets of 9-bit codes is multiplexedinto a pseudo STS-3 frame as shown in the Gigabit ethernet data pseudoSTS-3 frame table 500. As can be seen from FIG. 5, the number of bits ineach row of the Gigabit ethernet data pseudo STS-3 frame table 500 isequivalent to the number of bits in a row of an STS-3 signal since ithas to run at the same data rate. The byte definition for each entry inthe Gigabit ethernet data pseudo STS-3 frame table 500 can be seen inFIG. 8 which will be discussed in further detail below.

FIG. 6 is a tabular illustration of a pseudo STS-3 frame for use inmultiplexing fiber channel data. Referring to FIG. 6, as can be seen,the fiber channel data pseudo STS-3 frame table 600 substantiallycorresponds to the STS-3 inverse multiplexer 130 of the overall system100 shown in FIG. 1. In particular, the fiber channel data pseudo STS-3frame table 600 of FIG. 6 illustrates the pseudo STS-3 frame in the caseof Fiber Channel signals. In particular, if the data is Fiber Channeldata, the 10-bit codes are passed through with no translation since thedata rate is much less as compared with the case where the data isGigabit Ethernet. Indeed, the 10-bit codes are inverse multiplexed intoeight sets of 10-bit codes and multiplexed in to the pseudo STS-3 frameof FIG. 6. Again, the byte definition for each entry in the translationtable 600 of FIG. 6 can be seen in FIG. 8.

FIG. 7 is a tabular illustration of a pseudo STS-3 frame for use inmultiplexing VRH-RZ (Variable Rate High Speed-RZ) data. Referring toFIG. 7, for the 1,129.984 Mb/s RZ signal, the data is multiplexed intothe pseudo STS-3 frame for VRH-RZ data table 700 shown in FIG. 7 inblocks of 10-bits at 112.9984 MHz. For the 564.992 Mb/s signal, the datais multiplexed into the pseudo STS-3 frame for VRH-RZ data table 700shown in FIG. 7 in blocks of 5-bits at 112.9984 MHz. This allows thesame clock and logic structure to be reused. Again, the byte definitionof each of the entries in the pseudo STS-3 frame for VRH-RZ data table700 of FIG. 7 can be found in FIG. 8. A skilled artisan would haveavailable a variety of methods to interface to RZ signals, severalapproaches of which are disclosed in pending application entitled,“System and Method for Recovering RZ Formatted Data Using NRZ Clock andData Recovery,” having inventors Nicholas J. Possley and David B. Upham,filed on May 9, 2001.

FIG. 8 illustrates frame byte definitions for the pseudo STS-3 framesshown in FIGS. 5-7. Referring to FIG. 8, the byte definition table 800includes a corresponding definition of each byte entry of the pseudoSTS-3 frame tables 500, 600, and 700 shown in FIGS. 5-7, respectivelyfor Gigabit ethernet data, fiber channel data and VRH-RZ data, as wellas their corresponding value. For example, bytes A1 and A2 correspondsto the framing byte with values of 0xF6 and 0x28, respectively.Moreover, bytes R, R1, and R2 correspond to the 8 bit fixed stuff, 9 bitfixed stuff and 10 bit fixed stuff, respectively, having values of 0xFF,0x1FF and 0x3FF, respectively.

Referring back to FIGS. 5-7, as can be seen, the STS-3 frames arescrambled using the standard SONET scrambler and sent to the modem 140(FIG. 1). Further, the frame contains fixed stuff bytes and variablestuff bytes which are included due to data rate mismatch. Additionally,the STS-3 frames shown in FIGS. 5-7 contain parity BIP-8 bytes used forperformance monitoring and establishing Signal Degrade conditions overthe data link. In particular, the parity is determined over each pseudoSTS-1 within each of the pseudo STS-3s. Moreover, as can be seen, theframe also contains ID bytes which are used to authenticate the sourceof the data and order. In particular, if the order or authenticationdoes not match, then a cross-connect fault may be declared on the dropside. Additionally, the frame further contains an Alarm NotificationSignal (ANS) byte which is used to indicate to the far end drop-sidethat there is a near end add-side defect. Furthermore, for faultisolation, LOS defect may be accumulated to provide a LOS fault, whileLOL may be accumulated to provide a LOL fault.

FIG. 9 illustrates a configurable STS-3 frame for a VRVH (Variable RateVery High) circuit pack in accordance with another embodiment of thepresent invention, while FIG. 10 illustrates a table showing theconfiguration parameters for each data rate for the configurable STS-3frame of FIG. 9.

In one embodiment, the VRVH circuit pack is configured to supportnon-standard signals in the range from 565 Mb/s to 1,184.265 Mb/s. Inparticular, the STS-3 frame shown in FIG. 9 has the same number of bitsper frame as an STS-3 data which is 2,160 bits per row. Furthermore, theVRVH circuit pack may be configured to provide the functionality oftransparently transporting the non-standard signals through the datanetwork system. The data network system may be through-timed from theinput signals, with the data being multiplexed into the STS-3 frameshown in FIG. 9. Furthermore, as shown, FIG. 10 illustrates the frameparameters for the various signal types as applied to the STS-3 frameshown in FIG. 9.

FIG. 11 illustrates frame byte definitions for the frame for the STS-3and the corresponding data rate for the various signal types as shown inFIG. 9-10, respectively. Referring to the figure, it can be seen that,for example, bytes A1 and A2 correspond to framing bytes with values of0xF6 and 0x28, respectively. Moreover, bytes R(0), R(1), and R(2)correspond to 8, 9 and 10 bit fixed stuff having values of 0xFF, 0x1FF,and 0x3FF, respectively. Furthermore, referring back to FIG. 10, theNEC1.12 parameters were selected based upon an 8 KHz frame rate, and dueto the PLL divider limitations, the frame rate may be slightlydifferent.

FIG. 12 illustrates a flowchart for providing data translation in theadd direction in accordance with one embodiment of the presentinvention.

Referring to FIG. 12, in the add direction, at step 1210, the 8B/10Bencoded data is received. Thereafter at step 1220, the clock signal fromthe received data is recovered and the data rate is detected. At step1230, the 10-bit data is mapped to corresponding 9-bit code using alook-up table as shown in FIG. 1, and at step 1240, the 9-bit code isinverse multiplexed to corresponding pseudo STS-3 signals which aresynchronized to the clock signal of the encoded data received at step1210.

FIG. 13 illustrates a flowchart for providing data translation in thedrop direction in accordance with one embodiment of the presentinvention.

Referring to FIG. 13, at step 1310, a plurality of STS-3 signals arereceived and at step 1320, the received STS-3 signals are multiplexedinto 9-bit data. Thereafter at step 1330, the multiplexed 9-bit data ismapped to corresponding 10-bit data. Finally, at step 1340, the 8B/10Bencoded data corresponding to the 10-bit data is regenerated after beingsynchronized with the received STS-3 signals.

As discussed above, in accordance with one embodiment of the presentinvention, in the add direction, the Gigabit Ethernet, RZ signals, orFiber Channel data is inverse multiplexed into eight pseudo STS-3 datastreams. The data network system 100 then modulates and sums the datastream with all other data streams for transport over an optical fiberconnection. At the far end, the data network system 100 receives theeight pseudo STS-3 signals from the modem 140 and multiplexes the databack into the original high speed data stream. Pending U.S. patentapplication entitled “Variable Rate High-Speed Input and Output inOptical Communication Network,” having inventors Tian Shen, Robert B.Clarke, Jr., Thomas J. Roman, David B. Upham, David A. Pechner, andLaurence J. Newell, filed on May 8, 2001, and assigned to the assigneeof the present application, Kestrel Solutions, Inc., provides additionalexamples of variable rate high speed input and output in an opticalnetwork using optical frequency division multiplexing, the disclosure ofwhich is incorporated in its entirety by reference for all purposes.

In the drop direction, the data network system 100 may be configured toreceive both sets of eight data streams from each of the dropcross-connects. Accordingly, SONET framers may be used to frame-up eachof the pseudo STS-3s, with the delay compensated for between each of thepseudo STS-3's in each set of eight data streams. It should be notedthat the delay is compensated for between the pseudo STS-3's in a set.In one aspect, the maximum delay between any pseudo STS-3 isapproximately 26.3 μs. Since this delay value is much less than theframe period of approximately 125 μs, the alignment of the pseudoSTS-3's may occur where the framing pulses are nearest to each other.Moreover, it should be noted that in both the add and drop directions,the system 100 may be configured to perform a predetermined level ofperformance monitoring and fault detection on the data stream.

In one aspect of the present invention, a Gigabit Ethernet Circuit Packproposed by the assignee of the present invention, Kestrel Solutions, isconfigured to provide an additional interface added to the low speedshelf, the added interfaces including 1250 Mbps Gigabit Ethernet, 1062.5Mbps Fiber Channel, 1129.984 Mb/s Return-to-Zero (RZ) data and 564.992Mbps RZ data. The circuit pack is thus configured to provide thefunctionality of transparently transporting these signal formats throughthe backend of a data network which is through-timed from the inputsignals.

In particular, as discussed above, since both the Gigabit Ethernet andthe Fiber Channel signals are encoded using the 8B/10B encoding scheme,the 8 bits are transmitted into 10 bits for the purpose of transitiondensity of data for the clock recoveries and parity information foradditional error detection. Indeed, since the 8 bits are mapped into twosets of 10-bit codes, the two sets providing the parity information, itcan be seen that only a maximum of 512 different codes need be used.Furthermore, by examining the code table in IEEE 802.3 publication, itcan be seen that 72 of the 512 codes are duplicates, which leaves 440codes for the data. Additionally, apart from the data, IEEE 802.3publication defines 12 special codes used for various functions such asstart-of-packet, error propagation, end-of-pocket, idle, and so on, withparity that gives 24 codes. Therefore, the total number of codes is 464codes, which can be fully represented by 9-bit codes. Indeed, inaccordance with one aspect of the present invention, to ensure thatparity and special code functions are passed onto the customers, thedata may be transported transparently, as described above, for example,where 9-bit codes can fully represent the data.

In the manner described above, in accordance with the present invention,there is provided method and system for providing data transmission withtransparency over the Gigabit Ethernet data stream which includesreceiving the 10 bit code with a data rate of 1,250 Mbits/second fromthe encoded 8B/10B data and arbitrarily selecting 9 bit codes using alook-up translation table which can fully represent the 10 bit codesreceived. The translated 9 bit codes with a data rate of 1,125Mbits/second is then provided to eight STS-3 inverse multiplexer whichinverse multiplexes the received codes into eight STS-3 data streamseach with a data rate of 155.52 Mbits/second+offset Δ which are thenprovided to the modem at the far end.

Various other modifications and alterations in the structure and methodof operation of this invention will be apparent to those skilled in theart without departing from the scope and spirit of the invention.Although the invention has been described in connection with specificpreferred embodiments, it should be understood that the invention asclaimed should not be unduly limited to such specific embodiments. It isintended that the following claims define the scope of the presentinvention and that structures and methods within the scope of theseclaims and their equivalents be covered thereby.

1. A method of transporting data through a data network, comprising thesteps of: receiving an encoded data; mapping said received data to apredetermined data; and multiplexing said mapped predetermined data. 2.The method of claim 1 wherein said encoded data includes 8B/10B encodeddata.
 3. The method of claim 2 wherein said encoded data includes one ofa Gigabit Ethernet data and a Fiber Channel data.
 4. The method of claim1 wherein said step of receiving further includes the step ofdetermining a data rate of said received encoded data.
 5. The method ofclaim 4 wherein said step of receiving further includes the step ofrecovering a clock signal from said received encoded data.
 6. The methodof claim 5 wherein said clock signal has a rate one tenth of said datarate.
 7. The method of claim 1 wherein predetermined data includes a9-bit data.
 8. The method of claim 7 wherein said 9-bit data includesone of an arbitrary set of 9-bit data.
 9. The method of claim 1 whereinsaid multiplexing step includes the step of synchronizing saidmultiplexed predetermined data.
 10. The method of claim 9 wherein saidmultiplexed predetermined data is synchronized to a predetermined clocksignal.
 11. The method of claim 10 wherein said predetermined clocksignal includes a phase locked loop clock signal.
 12. An apparatus forproviding data transport through a data network, comprising: a clockrecovery unit configured to receive an encoded data; a data translationunit coupled to said clock recovery unit, configured to translate saidreceived data to a predetermined data; and an inverse multiplexercoupled to said data translation unit, configured to inverse multiplexsaid translated predetermined data.
 13. The apparatus of claim 12wherein said encoded data includes 8B/10B encoded data.
 14. Theapparatus of claim 13 wherein said encoded data includes one of aGigabit Ethernet data and a Fiber Channel data.
 15. The apparatus ofclaim 12 wherein said clock recovery unit is further configured todetect a data rate of said received encoded data.
 16. The apparatus ofclaim 15 wherein said clock recovery unit is further configured torecover a clock signal from said received encoded data.
 17. Theapparatus of claim 16 wherein said clock signal has a rate one tenth ofsaid data rate.
 18. The apparatus of claim 12 wherein predetermined dataincludes a 9-bit data.
 19. The apparatus of claim 18 wherein said 9-bitdata includes one of an arbitrary set of 9-bit data.
 20. The apparatusof claim 12 wherein said inverse multiplexer is further configured tosynchronize said multiplexed predetermined data to a predetermined clocksignal.
 21. The apparatus of claim 20 wherein said predetermined clocksignal includes a phase locked loop clock signal.
 22. The apparatus ofclaim 12 further including a modem coupled to said inverse multiplexerconfigured to receive said inverse multiplexed translated predetermineddata for transmission.
 23. The apparatus of claim 22 wherein saidinverse multiplexed translated predetermined data includes a pluralityof STS-3 signals.
 24. The apparatus of claim 23 wherein said pluralityof STS-3 signals includes eight STS-3 signals for transmission.
 25. Anapparatus for providing data transport in a network, comprising: ademultiplexer configured to demultiplex received data; a datatranslation unit coupled to said multiplexer configured to translatesaid demultiplexed data to a predetermined data; and a serializercoupled to said data translation unit configured to receive saidtranslated predetermined data and accordingly to generate acorresponding encoded data.
 26. The apparatus of claim 25 wherein saidreceived data includes a plurality of STS-3 signals.
 27. The apparatusof claim 26 wherein said plurality of STS-3 signals includes eight STS-3signals.
 28. The apparatus of claim 26 further including a plurality ofFIFOs each configured to frame align said each of STS-3 signals, saidframe aligned STS-3 signals corresponding to said received signal. 29.The apparatus of claim 25 wherein said demultiplexed data includes a9-bit data.
 30. The apparatus of claim 29 wherein said 9-bit data has adata rate of 1,125 Mbits/second.
 31. The apparatus of claim 29 whereinsaid demultiplexer is further configured to perform parity checks onsaid received data.
 32. The apparatus of claim 25 wherein saidpredetermined data includes a 10-bit data.
 33. The apparatus of claim 25wherein said serializer is configured to synchronize the translatedpredetermined data.
 34. The apparatus of claim 33 wherein saidtranslated predetermined data includes a 10-bit data.
 35. The apparatusof claim 34 wherein said 10-bit data has a data rate of 1,250Mbits/second.
 36. The apparatus of claim 35 wherein said encoded dataincludes an 8B/10B encoded data.
 37. A method for providing datatransport in a network, comprising the steps of: demultiplexing areceived data; translating said demultiplexed data to a predetermineddata; and generating a corresponding encoded data based on saidtranslated predetermined data.
 38. The method of claim 37 wherein saidreceived data includes a plurality of STS-3 signals.
 39. The method ofclaim 38 wherein said plurality of STS-3 signals includes eight STS-3signals.
 40. The method of claim 38 further including the step of framealigning said each of STS-3 signals, said frame aligned STS-3 signalscorresponding to said received data for demultiplexing.
 41. The methodof claim 37 wherein said demultiplexed data includes a 9-bit data. 42.The method of claim 41 wherein said 9-bit data has a data rate of 1,125Mbits/second.
 43. The method of claim 41 further including the step ofperforming parity checks on said received data.
 44. The method of claim37 wherein said predetermined data includes a 10-bit data.
 45. Themethod of claim 37 further including the step of synchronizing thetranslated predetermined data.
 46. The method of claim 45 wherein saidtranslated predetermined data includes a 10-bit data.
 47. The method ofclaim 46 wherein said 10-bit data has a data rate of 1,250 Mbits/second.48. The method of claim 47 wherein said encoded data includes an 8B/10Bencoded data.